Karina
43 lines
2.0 KiB
C
43 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-3.0-or-later
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// Copyright (c) 2026 0xKarinyash
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#pragma once
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#include "bootinfo.h"
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#include <types.h>
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#define PTE_PRESENT (1ULL << 0) // 0 -- not present: page fault when trying to access; 1 -- present, can RW
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#define PTE_RW (1ULL << 1) // 0 -- RO: page fault trying to write; 1 -- RW
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#define PTE_USER (1ULL << 2) // 0 -- Ring 0: R3 get segfault gtrying to access; 1 -- Ring 3
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#define PTE_PWT (1ULL << 3) // 1 -- skip L1/L2 cache when writing to RAM
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#define PTE_PCD (1ULL << 4) // 1 -- cache disabled for page
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#define PTE_ACCESSED (1ULL << 5) // CPU sets it (by itself) to 1 when RW this page
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#define PTE_DIRTY (1ULL << 6) // CPU sets it when writing to this page
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#define PTE_NX (1ULL << 63) // No execute
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#define PTE_ADDR_MASK 0x000FFFFFFFFFF000 // mask to get clean physical addres that located at bits 12-51
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#define PTE_GET_ADDR(entry) ((entry) & PTE_ADDR_MASK) // get physical address
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#define PTE_GET_FLAGS(entry) ((entry) & ~PTE_ADDR_MASK) // get flags
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#define VMM_PT_INDEX(virt) (((virt) >> 12) & 0x1FF) // Table Index (bits 12-20)
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#define VMM_PD_INDEX(virt) (((virt) >> 21) & 0x1FF) // Page Directory Index (bits 21-29)
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#define VMM_PDPT_INDEX(virt) (((virt) >> 30) & 0x1FF) // PDPT Index (bits 30-38)
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#define VMM_PML4_INDEX(virt) (((virt) >> 39) & 0x1FF) // PML4 Index (bits 39-47): main page
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#define KERNEL_VMA 0xFFFFFFFF80000000
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#define HHDM_OFFSET 0xFFFF888000000000
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#define FB_VIRT_BASE 0xFFFFFFFFFC000000
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#define KERNEL_VIRT_TO_PHYS(virt) ((virt) - KERNEL_VMA)
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#define PHYS_TO_HHDM(phys) ((phys) + HHDM_OFFSET)
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#define HHDM_TO_PHYS(virt) ((virt) - HHDM_OFFSET)
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void VMVirtualMemoryInitialize(Bootinfo* info);
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UInt64* VMVirtualMemoryMapPage(UInt64* PML4, UInt64 physical, UInt64 virtual, UInt64 flags);
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UInt64 VMVirtualMemoryCreateAddressSpace();
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UInt64 VMGetCurrentCR3();
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void VMLoadCR3(UInt64 PML4Address);
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void VMVirtualMemorySetupUserStack(UInt64* physicalPML4); |